W6300

W6300 is a WIZnet 10/100 TOE ethernet chip that combines the high-speed ethernet performance with Dual IPv4/v6 Hardware stack. To support ethernet performance up to 90Mbps and above, it supports 150MHz system clock and QSPI interface(including 4 Data lines). W6300 supports a total SRAM size of 64KB for 8 sockets, each has 4KB TX/RX buffer by default.

90Mbps

Support Up-tp 90Mbps High-speed Network Performance

TCP/IPv4, IPv6

Support Hardwired TCP/IPv4, IPv6

Quad-SPI, 8-bits BUS

Support Quad-SPI (MODE 0/3) and 8-bits Parallel BUS

Ethernet MACPHY

Support 10BaseT/100BaseTX Ethernet MACPHY

Key Features

64KB Socket buffers

Support 64KB TX/RX Socket buffers

Hardwired Internet Protocols

TCP, UDP, WOL over UDP, ICMP, ICMPv6, IGMPv1/v2, IPv4, IPv6, ARP, PPPoE

3.3V Operation

Support 3.3V Operation with 5V I/O tolerance

48LQFP/QFN

Support 48LQFP/QFN types

Features

  • Supports following Hardwired TCP/IP Protocols : TCP, UDP, ICMP, IPv4, IPv6, ARP, IGMP, PPPoE
  • Supports 8 independent sockets simultaneously
  • Supports Power down mode
  • Supports Wake on LAN over UDP
  • Supports High Speed Serial Peripheral Interface(SPI MODE 0, 3)
  • Internal 32Kbytes Memory for Tx/Rx Buffers
  • 10BaseT/100BaseTX Ethernet PHY embedded
  • Support Auto Negotiation (Full and half duplex, 10 and 100-based)
  • Not support IP Fragmentation
  • 3.3V operation with 5V I/O signal tolerance
  • LED outputs (Full/Half duplex, Link, Speed, Active)
  • 48 Pin LQFP Lead-Free Package (7x7mm, 0.5mm pitch)

Documentation

datasheet

Name Description Notes
W6300 Datasheet (EN) Technical specifications and features of the W6300 chip -

W6300

close