iEthernet Chips

Dive into our iEthernet Chips, designed for robust and high-speed network connections. Perfect for applications demanding reliable connectivity, they offer superior performance in a compact form.

iEthernet Chips
The W5100S chip is a cost-effective embedded Internet controller featuring a full hardwired TCP/IP stack based on WIZnet technology. It enables internet connectivity through either SPI or Parallel System BUS, supporting up to 70MHz clock speed on SPI for seamless connection to external MCUs. This chip integrates a 10/100 Ethernet MAC and PHY, providing a single-chip solution for reliable internet access. It supports major TCP/IP protocols and offers 4 independent sockets along with 16KB of internal memory for efficient data handling. The W5100S facilitates easy Ethernet application development with its simple SOCKET programming, includes energy-saving features like WOL and Power Down Mode, and is backward compatible with W5100 firmware. Available in 48 Pin LQFP and QFN Lead-Free packages, the W5100S is designed for embedded systems requiring stable and low-cost internet connectivity.



W5100S is an embedded Internet controller designed as a full hardwired TCP/IP with WIZnet technology. W5100S provides internet connectivity to your embedded system by using SPI (Serial Peripheral Interface) or Parallel System BUS. SPI and Parallel System BUS provide easy connection via external MCU to W5100S. The clock speed of W5100S SPI supports upto 70MHz and the Parallel System Bus supports higher speed network communication than SPI. Since W5100S integrates the Hardwired TCP/IP stack with 10/100 Ethernet MAC and PHY, it is truly a one-chip solution for the stable internet connectivity. WIZnet’s hardwired TCP/IP stack supports TCP, UDP, IPv4, ICMP, ARP, IGMP, and PPPoE - and it has been proven through various applications over the last decade. W5100S provides four independent SOCKETs to be used simultaneously and 16KB internal memory for data communication. Users can develop an Ethernet application easily by using the simple W5100S SOCKET program instead of handling a complex Ethernet controller. W5100S also provides WOL (Wake on LAN) and a Power Down Mode in order to reduce power consumption. W5100S is a low-cost chip that exceeds its predecessor, W5100. Existing firmware using W5100 can be used on W5100S without modification. W5100S has two types of packages, 48 Pin LQFP & QFN Lead-Free Package.


  • Support Hardwired Internet Protocols: TCP, UDP, WOL over UDP, ICMP, IGMPv1/v2, IPv4, ARP, PPPoE
  • Support 4 Independent Hardware SOCKETs simultaneously
  • Support SOCKET-less Command: ARP-Request, PING-Request
  • Support Ethernet Power Down Mode & Main Clock gating for power save
  • Support Wake on LAN over UDP
  • Support Serial & Parallel Host Interface: High Speed SPI(MODE 0/3), Parallel System Bus with 2 Address signal & 8bits Data
  • Internal 16 Kbytes Memory for TX/ RX Buffers
  • Not support IP Fragmentation
  • Not Maintain ARP-cache Table
  • 10BaseT/100BaseTX Ethernet PHY Integrated
  • Support Auto Negotiation (Full/Half Duplex, 10/100 Speed)
  • Support Auto-MDIX when Auto-Negotiation Mode.
  • 3.3V operation with 5V I/O signal tolerance
  • LED outputs (Full/Half Duplex, Link, 10/100 Speed, Active)
  • Two types of packages: 48 Pin LQFP & QFN Lead-Free Package (7x7mm, 0.5mm pitch)