WIZ610mj

WIZ610MJ is the network module that includes W6100 (TCP/IP hardwired chip, include PHY), MAG-JACK (RJ45 with X’FMR) with other glue logics. Please click the link for the further information about W6100. It can be used as a component and no effort is required to interface W6100 and Transformer. The best advantage of the WIZ610MJ is that it supports IPv6. The WIZ610MJ is an option for users who want to develop their Internet enabling systems rapidly.

Built-in W6100

Support hardwired TCP/IP (IPv4/IPv6, 8 sockets) · 32KB socket buffers

ioModule Form Factor

Support 2×10, 2.54mm header · compact pluggable

BUS & Fast-SPI

Support 8-bit Indirect BUS and Fast-SPI (MODE 0/3)

Ethernet MACPHY

Support 10BaseT/10BaseTe/100BaseTX Ethernet MACPHY

Key Features

Internet Protocols

Support TCP, UDP, IPv4/IPv6, ICMPv4/v6, ARP, NDP, IGMPv1/v2, MLDv1/v2, PPPoE

Integrated RJ-45 (MagJack)

Support transformer & Link/Act LEDs built-in

Dedicated TX/RX Buffers

Support 32KB configurable allocation for stable throughput

3.3V -40℃ to 70℃

Support 3.3V Operation (2.7V to 3.6V)

Pin Information

P1

PinTypeNameDescription
1PGNDGround
2PGNDGround
3P3V3D3.3 V Power
4IMODESPI/BUS Select pin
SPI : Low
BUS : High
5ISCSnSPI Chip select (active low)
6ISCLKSPI Clock input
7IMOSI/A0SPI : Master-Out / Slave-In
BUS : A0
8O/IMISO/A1SPI : Master-In / Slave-Out
BUS : A1
9IRDnRead Strobe
SPI : indicates Read Operation
BUS : indicates Read Operation
10IWRnWrite Strobe
SPI : indicates Read Operation
BUS : indicates Write Operation

P2

PinTypeNameDescription
1IRSTnHardware reset (active low, ≥ 1 µs)
2OINTnInterrupt output (low-active)
3IOD7Data Bus pin SPI : DAT [7:0] must be floated.
BUS : Data is carried over DAT [7:0] between HOST and W6100
4IOD6Data Bus pin SPI : DAT [7:0] must be floated.
BUS : Data is carried over DAT [7:0] between HOST and W6100
5IOD5Data Bus pin SPI : DAT [7:0] must be floated.
BUS : Data is carried over DAT [7:0] between HOST and W6100
6IOD4Data Bus pin SPI : DAT [7:0] must be floated.
BUS : Data is carried over DAT [7:0] between HOST and W6100
7IOD3Data Bus pin SPI : DAT [7:0] must be floated.
BUS : Data is carried over DAT [7:0] between HOST and W6100
8IOD2Data Bus pin SPI : DAT [7:0] must be floated.
BUS : Data is carried over DAT [7:0] between HOST and W6100
9IOD1Data Bus pin SPI : DAT [7:0] must be floated.
BUS : Data is carried over DAT [7:0] between HOST and W6100
10IOD0Data Bus pin SPI : DAT [7:0] must be floated.
BUS : Data is carried over DAT [7:0] between HOST and W6100

Features

  • Supports IPv4/IPv6 Dual Stack
  • Hardwired Internet protocols: TCP, UDP, ICMPv6, ICMPv4, IGMP, MLDv1, ARP, PPPoE
  • 8 independent sockets with 32 KB internal TX/RX buffer
  • SOCKET-less commands for ARP, PING, and ICMPv6 (DAD, NA, RS)
  • High-speed SPI interface (Mode 0/3)
  • Parallel bus mode with 8-bit data and 2 address lines
  • Auto-negotiation and Auto-MDIX (for 10/100 Mbps)
  • Ethernet Power-down & Main Clock Switching for low-power operation
  • Supports Wake-on-LAN (UDP)
  • 2 × 10-pin headers (2.54 mm pitch)
  • Operating temperature: −40 °C to +85 °C

Electrical Characteristics

DC Characteristics

SymbolParameterPinsMinTypMaxUnit
VDDSupply voltage3.3 V2.973.33.63V
VIHHigh-level inputALL2.0-V
VILLow-level inputALL0.8V
VOHHigh-level outputALL2.43.3V
VOLLow-level outputALL0.00.4V
IDDSupply current (Normal)3.3 V132mA
IPDSupply current (Power-down)3.3 V13mA

Power Dissipation

ConditionMinTypMaxUnit
100M Link98115mA
10M Link112265mA
10M-Te Link75190mA
100M Unlink50199mA
10M Unlink26170mA
10M-Te Unlink26130mA
Un-Link (Auto-negotiation mode)50199mA
Power Down mode1420mA

Documentation

Name Description Notes
Datasheet Technical datasheet for WIZ610MJ module WIZ610MJ Datasheet v1.0

Mechanical Information

  • Form factor: Compact ioModule with integrated RJ45 MAG-JACK
  • Pin pitch: 2.54 mm (2 × 10 header)
  • Dimensions: 28.0 × 28.0 mm (typ.)

WIZ610mj

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