W6100

The W6100 chip is an advanced Internet controller supporting IPv4/IPv6 dual stack, building upon WIZnet's hardwired TCP/IP technology. It supports a range of protocols including TCP, UDP, and ICMP, along with a built-in 10/100 Ethernet PHY and MAC Controller, making it ideal for internet-enabled devices. With 8 independent sockets and SOCKET-less commands for network management, the W6100 offers flexibility for various applications. It features SPI and parallel BUS interfaces, 32KB internal memory, and is designed for efficiency with low power consumption and heat. Available in 48 LQFP and 48 QFN packages, it is PIN-2-PIN compatible with the W5100S, enhancing its utility in embedded systems.

55Mbps

Support Up-to 55Mbps Network Performance

TCP/IPv4, IPv6

Support Hardwired TCP/IPv4, IPv6

SPI, 8-bits BUS

Support Fast-SPI (MODE 0/3) and 8-bits Parallel BUS

Ethernet MACPHY

Support 10BaseT / 10BaseTe / 100BaseTX Ethernet MACPHY

Key Features

32KB Socket buffers

Support 32KB TX/RX Socket buffers

Hardwired Internet Protocols

TCP, UDP, WOL over UDP, ICMP, ICMPv6, IGMPv1/v2, IPv4, IPv6, ARP, PPPoE

3.3V -40℃ to 85℃

Support 3.3V Operation with 5V I/O tolerance

48LQFP/QFN

Support 48LQFP/QFN types

W5100S Pin2Pin

Support W5100S Pin-2Pin Compatible

Features

  • Support Hardwired TCP/IP Protocols : TCP, UDP, IPv6, IPv4, ICMPv6, ICMPv4, IGMP, MLDv1, ARP, PPPoE
  • Support IPv4/IPv6 Dual Stack
  • Support 8 independent SOCKETs simultaneously with 32KB Memory
  • Support SOCKET-less Command: ARP, PING, ICMPv6(PING, ARP,DAD,NA,RS) Command for IPv6 Auto-configuration& Network Monitoring
  • Support Ethernet Power Down Mode & System Clock Switching for power save
  • Support Wake on LAN over UDP
  • Support Serial & Parallel Host Interface: High Speed SPI(MODE 0/3), System Bus with 2 Address signal & 8bit Data
  • Internal 16Kbytes Memory for TX/ RX Buffers
  • 10BaseT / 10BaseTe / 100BaseTX Ethernet PHY Integrated
  • Support Auto Negotiation (Full and half duplex, 10 and 100-based )
  • Support Auto-MDIX only on Auto-Negotiation Mode
  • Not support IP Fragmentation
  • 3V operation with 5V I/O signal tolerance
  • Network Indicator LEDs (Full/Half Duplex, Link, 10/100 Speed, Active)
  • 48 Pin LQFP & QFN Lead-Free Package (7x7mm, 0.5mm pitch)
  • W5100S PIN-2-PIN Compatible

Documentation

datasheet

Name Description Notes
W6100 Datasheet (EN) Technical specifications and features of the W6100 chip -
W6100 Datasheet (KR) Technical specifications and features of the W6100 chip -

W6100

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