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W5100S

The W5100S chip is a cost-effective embedded Internet controller featuring a full hardwired TCP/IP stack based on WIZnet technology. It enables internet connectivity through either SPI or Parallel System BUS, supporting up to 70MHz clock speed on SPI for seamless connection to external MCUs. This chip integrates a 10/100 Ethernet MAC and PHY, providing a single-chip solution for reliable internet access. It supports major TCP/IP protocols and offers 4 independent sockets along with 16KB of internal memory for efficient data handling. The W5100S facilitates easy Ethernet application development with its simple SOCKET programming, includes energy-saving features like WOL and Power Down Mode, and is backward compatible with W5100 firmware. Available in 48 Pin LQFP and QFN Lead-Free packages, the W5100S is designed for embedded systems requiring stable and low-cost internet connectivity.

25Mbps

Support Up-to 25Mbps Network Performance

TCP/IPv4

Support Hardwired TCP/IPv4

SPI, 8-bit BUS

Support SPI (MODE 0/3) and 8-bits Parallel BUS

Ethernet MACPHY

Support 10BaseT / 100BaseTX Ethernet MACPHY

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Key Features

16KB Socket buffers

Support 16KB TX/RX Socket buffers

Hardwired Internet Protocols

TCP, UDP, WOL over UDP, ICMP, IGMPv1/v2, IPv4, ARP, PPPoE

3.3V -40℃ to 85℃

Support 3.3V Operation with 5V I/O tolerance

48LQFP/QFN

Support 48LQFP / QFN types

Features

  • Support Hardwired Internet Protocols: TCP, UDP, WOL over UDP, ICMP, IGMPv1/v2, IPv4, ARP, PPPoE
  • Support 4 Independent Hardware SOCKETs simultaneously
  • Support SOCKET-less Command: ARP-Request, PING-Request
  • Support Ethernet Power Down Mode & Main Clock gating for power save
  • Support Wake on LAN over UDP
  • Support Serial & Parallel Host Interface: High Speed SPI(MODE 0/3), Parallel System Bus with 2 Address signal & 8bits Data
  • Internal 16 Kbytes Memory for TX/ RX Buffers
  • Not support IP Fragmentation
  • Not Maintain ARP-cache Table
  • 10BaseT/100BaseTX Ethernet PHY Integrated
  • Support Auto Negotiation (Full/Half Duplex, 10/100 Speed)
  • Support Auto-MDIX when Auto-Negotiation Mode.
  • 3.3V operation with 5V I/O signal tolerance
  • LED outputs (Full/Half Duplex, Link, 10/100 Speed, Active)
  • Two types of packages: 48 Pin LQFP & QFN Lead-Free Package (7x7mm, 0.5mm pitch)

Documentation

datasheet

Name Description Notes
W5100S Datasheet Technical specifications and features of the W5100S chip - W5100S Datasheet link

Technical Documents

Name Description Notes
W5100S Errata Sheet Known issues and corrections for the W5100S chip - W5100S Errata Sheet link
W5100S vs W5100 Comparison Sheet Feature comparison between W5100S and W5100 chips - W5100S vs W5100 Comparison Sheet link

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Related modules

Complementary WIZnet solutions with diverse interfaces and performance levels

Evaluation Boards

WIZ500SR-RPlink

WIZ500SR-RP is a compact sized serial to Ethernet module using the RP2040 MCU with W5100S Ethernet Chip. WIZ500SR-RP is a protocol converter that transmits data sent by serial equipment as TCP/IP data, and converts the TCP/IP data received through the network back into serial data to the serial equipment.

WIZ810Siolink

WIZ810Sio is the internet offload network module that includes W5100S (TCP/IP hardwired chip, include PHY), MAG-JACK (RJ45 with X’FMR) with other glue logics. It can be used as a component and no effort is required to interface W5100S and Transformer. The WIZ810Sio is an ideal option for users who want to develop their Internet enabling systems rapidly.

W5100S-EVB-Picolink

W5100S-EVB-Pico is a microcontroller evaluation board based on the Raspberry Pi RP2040 and fully hardwired TCP/IP controller W5100S – and basically works the same as Raspberry Pi Pico board but with additional Ethernet via W5100S.

W5100S

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